1. Field of the Invention
The present invention relates to a protective circuit for protecting connecting contacts of monolithic integrated circuits from electrostatic discharges, particularly of input/output stages implemented in CMOS technology.
The invention further relates to a method of protecting monolithic integrated circuits from ESD pulses wherein the electrostatic charges in the areas of the connecting contacts are neutralized by means of resistive and sink devices.
2. Description of the Prior Art
The invention comprises resistive and sink devices for protecting connecting contacts of monolithic integrated circuits from electrostatic discharges. "Electrostatic discharges" as used herein means impulse currents caused by electrostatic discharge pulses (hereinafter ESD pulses). However, the protection also extends to steady-state currents which are supplied to the respective connecting contacts which may cause undesirable, thyristor-like conduction known as "latch-up".
The ESD pulse may, in the worst case, lead to breakdown between at least two semiconductor regions, forming a shorting channel which causes the circuit to cease functioning. The thin gate oxide of MOS transistors is particularly vulnerable. Another, frequent consequence of the ESD pulse is that it induces latch-up in certain semiconductor structures, whereby a short circuit is developed in the crystal shorting the supply lines that may result in a malfunction due to local overheating. This latch-up condition, as stated above, may also be initiated by a steady-state overload current supplied to the connecting contact, particularly in CMOS input/output stages. The wells required in CMOS technology, particularly in the complementary output-transistor pair, possibly also together with other subcircuits, represent thyristor-like circuit structures interconnected via the substrate which can be put into a latch-up condition and which will remain in this condition until the input current falls below the holding current.
To protect the connecting contacts from being destroyed by ESD pulses, resistive and sink devices are commonly provided which limit the overload voltages to low values, thus neutralizing the ESD pulses within the contact area as far as possible. Use is made of sink diodes, for example, which are normally operated in the reverse direction and exhibit a drainage effect both in their forward direction and in their breakdown direction. However, the breakdown threshold varies widely depending on the process technology used, and is hardly suited to reliably protecting all functional units associated with the respective connecting contacts. In MOS circuits, the n-channel output transistors are particularly vulnerable to breakdown.
Accordingly, it is the object of the invention as claimed to provide a circuit and a method for reliably protecting all connecting contacts of monolithic integrated circuits from ESD pulses which can be adapted to different technological parameters predominantly by proper circuit layout, with the integrated circuit being in a power-off or power-on condition.